AVDARK reading instructions for 5:th edition of the book (4:th edition instructionsa below)
Caches and Memory
The article about modern DRAM memory found at: http://www.anandtech.com/show/3851/everything-you-always-wanted-to-know-about-sdram-memory-but-were-afraid-to-ask
All of Appendix B
(not Miss Penalty for Out-of-Order Execution on pg B20-B22)
(not A Segmented Memory examples pg B51-54)
Catper 2
Everything except for:
2.4 Not included in course, but is very interesting!
2.5 Not included in course, but is very interesting!
2.6 Not included in course, but is very interesting!
Multiprocessors
The paper by Adve on Memory Models is included.
The Scott paper on Synchronization (except the issues that deal with timeout) is included.
The Agarwal paper (the trends but not the formulas).
The paper by Hagersten on WildFire is RT.
Slides by Stefanos
Chapter 5
5.1 All
5.2 All
5.3 All (except for the Workload sections)
5.4 All
5.5 All
5.6 All
5.7 Not included
5.8 All
5.9 Is RT
5.10 Is RT
5.11 Is RT
Programming MPs
Slides by Sverker
CPU and Pipelining
Appendix C (C.3, C.7-9 is RT) (C.6 not included)
Appendix A is RT
Chapter 3 (apart from 3.5, 3.10, 3.11 and 3.13 which are RT)
4.1
4.2
4.3
Future
The HiPEAC roadmap page 2-33. Page 34-40 are RT.
GPUs
4.4
Slides by David
AVDARK reading instructions for 4:th edition of the book
Sections marked RT are "read through" sections, i.e., understand the overall message but do not concentrate on any details. You should be able to answer simple basic questions about these topics.
All the slides shown in class are to be considered as course material, unless stated otherwise. Note that this includes the sldies by the guest lecturers as well. All slides are available under Slides in the menue.
Caches and Memory
The article about modern DRAM memory found at: http://www.anandtech.com/show/3851/everything-you-always-wanted-to-know-about-sdram-memory-but-were-afraid-to-ask
All of Appendix C
(not Miss Penalty for Out-of-Order Execution on pg C19-C21)
(not A Segmented Memory examples pg C49-C52)
Chapter 5
Everything, ecept for:
5.4 Not included in course, but is very interesting!
5.5 Not included in course, but is very interesting!
5.6 Not included in course, but is very interesting!
Multiprocessors
The paper by Adve on Memory Models is included.
The Scott paper on Synchronization (except the issues that deal with timeout) is included.
The paper by Hagersten on WildFire is RT.
4.1 All
4.2 All
4.3 All (except for the Workload sections)
4.4 All
4.5 All
4.6 All
4.7 Not included
4.8 Is RT
4.9 Is RT
4.10 Is RT
Programming MPs
Slides by Sverker
Multicores
Chapter 1
The Agarwal paper (the trends but not the formulas).
CPU and Pipelining
Appendix A (A.3, A.7-9 is RT) (A.6 not included)
Appendix B is RT
Chapter 2 (apart from 2.5 and 2.10 which are RT)
Future
The HiPEAC roadmap page 2-33. Page 34-40 are RT.
GPUs
Slides by David