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Department of Information Technology

Computer Architecture, First Course

Digital logic

Mandatory tasks:

  1. Design an XOR gate in CMOS. Try to use as few transistors as possible. Your solution should be in the form of a clearly drawn diagram. Be prepared to explain how it works.
  2. Design a digital circuit for multiplying two three-bit positive integers. The solution must scale to larger numbers. Implement it in the Digital Works simulator. Print the solution and make a copy to your home directory. Be prepared to demonstrate the solution and explain how it works.
  3. Estimate the number of CMOS transistors used in your solution to 2. above. Also, estimate the time taken to compute a product if the delay at each gate is 1ns. Short written solutions are required.
  4. Be prepared to answer questions on Tanenbaum chapter 3. Typical questions can be to draw or explain the circuit diagrams in the figures in that chapter. Also be prepared to answer questions on the function and use of the MOS transistor.


For Task 1 (designing XOR in CMOS), begin by looking at the material here to gain an understanding of how logical functions are implemented in CMOS. You must have Java enabled in your browser in order to play with the demonstrations. Then search the web or look up in a book (a simple Google search on XOR and CMOS should give something) in order to find out how XOR can be designed. There is a large number of solutions to this, try to find one with as few transistors as possible. Draw a clear diagram in the style of the diagrams on the web page mentioned above of your preferred solution and be prepared to explain how it works.

For Task 2, begin by starting the Digital Works 2.0 simulator and learn its basics (getting-started instructions are here). When designing the multiplicator you will end up in hopelessly complicated diagrams unless you think carefully how to organise them. One very useful way is to define sub-diagrams, much as in figure 3-29 in the textbook where the D-latch is a sub-diagram. Of course the sub-diagrams must be defined somewhere (the D-latch is in 3-26). In this task you will probably use adders such as in 3-17 and 3-18 in many places so these are natural sub-diagrams. Use the Digital Works macro facility for this. Simulate your solution in order to determine that it works. Note that your circuit should have six inputs (the two three-bit numbers) and six outputs (the product might be six bits long).

Hint: A multiplication of two numbers can be implemented as repeated additions. The naive solution, to compute x*y through x-1 additions of y to itself, does not scale well to large numbers. A better way is to use the ordinary paper and pencil method of multiplication. For example, to compute 101 * 110:

     110 (6)
     101 (5)
   11110 (30)

How much time will this hand-in take to complete?

The time to prepare for this by reading and understanding chapter 3, and the web material on CMOS, and mastering the basics of Digital Works, will vary greatly depending on your inclination and experience, but should not take more than four full days including the lectures. Once you have done this the time taken to complete Task 1 should be at most a couple of hours and Task 2 at most half a day. Task 3 should be very quick (a few minutes) once you understand the principles. Task 4 and the demonstrations are conducted during the oral exam.

Further amusements

If you want to check out other digital logic simulators a good list is here. If you find this exercise interesting, use the LED display available in Digital works in order to show the result of the multiplication.

Updated  2003-10-06 16:42:22 by Zoran Radovic.