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Department of Information Technology

Combinatorial Register Allocation and Instruction Scheduling

Speaker:
Roberto Castañeda Lozano, Researcher at RISE SICS, PhD candidate at KTH

Date and Time
Wednesday, May 30th, 2018 at 15:15.

Location
Polacksbacken, ITC, room 1212.

Abstract
This talk presents a combinatorial optimization approach to register allocation
and instruction scheduling, two central compiler problems. Unlike conventional
heuristic algorithms, combinatorial optimization has the potential to solve
these problems optimally and to exploit processor-specific features readily.
Our approach is the first to leverage this potential in practice by capturing
the complete set of register allocation and instruction scheduling tasks used in
state-of-the-art compilers, scaling to medium-sized problems, and generating
executable code. The approach can be used to trade compilation time for code
quality beyond the usual compiler optimization levels, fully exploit
processor-specific features, and identify improvement opportunities in heuristic
algorithms.

Joint work with Mats Carlsson, Frej Drejhammar, Gabriel Hjort Blindell, and Christian Schulte

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Updated  2018-05-25 09:12:24 by Philipp Rümmer.